Course Objectives

• Learn the basic architecture of a Shakti processor
• Understand parallelism and multi-core processors
• Learn BlueSpec Verilog programming and implement using FPGA board
• Design and implementation of processors

Course Outcome

Course Syllabus

Module-1
Processor Architecture and Arithmetic Circuits
• Functional Units
• Basic Operational Concepts
• Operations, Operands
• Instruction representation
• Logical operations
• Decision making,
• Floating Point Representation
• Floating Point Operations

Module-2
BlueSpec Programming:
• General introduction to the BlueSpec approach
• BSV's concurrency and parallelism semantics
• Abstract rule-based processes.
• BSV to Verilog translation
• Connect BSV into existing Verilog/VHDL
• Export a BSV subsystem as a SystemC module
• Create BSV designs that use multiple clocks or resets
• Interfacing to external RTL

Module-3
Parallel Processing in Shakti Processor:
• Building a Datapath and Control Implementation Scheme
• Pipelining – Pipelined datapath and control
• Hardware multithreading – Multi-core processors and other Shared Memory Multiprocessors
• Introduction to Graphics Processing Units (Theory only)
• Memory Hierarchy, memory technologies and cache memory (Theory only)
• Accessing I/O Devices
• Interface circuits – USB.

Module-4
Processor Design (Part-I):
• Programming and Debugging Embedded Processors
• Hardware and Software Requirements
• Programming SHAKTI onto the FPGA boards - Part 1
• Programming SHAKTI onto the FPGA boards - Part 2
• Steps to install SHAKTI-SDK
• Steps to add a simple application to SHAKTI-SDK

Module-5
Processor Design (Part-II):
• Building a Zynq-7000 SoC Processor, Zynq-7000 SoC Cross Trigger Design
• Building and Programming a MicroBlaze Processor, Create an IP Integrator Design
• Memory-Mapping the Peripherals in IP Integrator
• Building and Programming a RISC-V Processor with IP integration
• Create a Top-Level Wrapper
• Design through Implementation
• Export the Design to SDK
• Peripheral Test Application
• Execute the Software Application on a Artix-7 100T Board

Reference:
1. David A. Patterson and John L. Hennessy, Computer Organization and Design: The Hardware/Software Interface, Fifth Edition, Morgan Kaufmann / Elsevier, 2014
2. Carl Hamacher, Zvonko Vranesic, Safwat Zaky and Naraig Manjikian, Computer Organization and Embedded Systems, Sixth Edition, Tata McGraw Hill, 2012.
3. https://shakti.org.in/documentation.html

Software Requirement:
• Bluespec Compiler
• Device Tree Compiler
• Vivado 2018
• Miniterm
• OpenOCD

Hardware Requirement:
• Artix-7 100T FPGA Board

Session Plan

Session 1

Basic Introduction to Computer Architecture.

https://www.youtube.com/watch?v=HEjPop-aK_w

Session 2

Combinational Circuits.

https://www.youtube.com/watch?v=tf0t7molCts

Session 3

Sequential Circuits.

https://www.youtube.com/watch?v=S0mKCNLmCh4

Session 4

Bluespec Introduction.

https://www.youtube.com/watch?v=lrxtFHSyiY8

Session 5

BSV Semantics.

https://www.youtube.com/watch?v=8ZnNcaPnN50

Session 6

BSV Arithmetic.

https://www.youtube.com/watch?v=HyXro5fH9g0

Session 7

BSV FIFOs Design.

https://www.youtube.com/watch?v=IR92kSm2uEc

Session 8

Pipelining Combinational Circuits.

https://www.youtube.com/watch?v=56QUjMD3xoI

Session 9

Hardware Compilation of Bluespec.

https://www.youtube.com/watch?v=5W9v-n-EZuo

Session 10

ASIC Implementation of Bluespec.

https://www.youtube.com/watch?v=accXeqAQOg4

Session 11

Non-Pipeline Architecture

https://www.youtube.com/watch?v=hhlOpadbLTc

Session 12

Pipeline Architecture

https://www.youtube.com/watch?v=doJpguZFTe0

Session 13

Multistage Pipeline Processor

https://www.youtube.com/watch?v=SWSTjQosOD0

Session 14

Branch Prediction Unit

https://www.youtube.com/watch?v=bWxDMDP8qJY

Session 15

Branch Prediction Unit

https://www.youtube.com/watch?v=Zr8WKIOIKsk