Computer System Architecture

Teacher

Dr. Jayakishan Meher

Category

Core Courses

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Course Name : Computer System Architecture

 

Code(Credit) : CUTM1897(3-2-1)

Course Objectives

  • Grasp characteristics of computer systems to develop balanced system design that maximizes the computer performance.
  • Identify elements of modern instruction sets and their impact on processor design including how constructs in high level languages are realized.
  • Experience use of a design/simulation tool to model various parts in computer design.

Learning Outcomes

COs Course Outcomes Mapping COs with POs (High-3, Medium-2, Low-1)
CO1 Able to gain knowledge on installation of Windows and Linux both in Physical and VM PO1 (3)
CO3 Able to identify and resolve the hardware and software problem PO2(3), PO5(1)
CO4 Acquire hands-on skill in hardware administration PO3 (2)
  • .

Course Syllabus


Module-1: Data Representation and Basic Computer Arithmetic
Number systems and Complements, Fixed and floating point representation, Binary codes and character representation, Binary addition and subtraction, Multiplication algorithms for integers, Division algorithms for integers

Practice:

  •  Simulation of multiplication algorithm using C / MATLAB
  •  Simulation of Division algorithm using C / MATLAB

Assignment:

  • Represent 525.5 in IEEE 754 single precision and double precision formats.
  • Perform 7×3 multiplication using Booth algorithm.
  • Explain 8421, 2421, 5421 BCD with examples

 

Module-2: Digital logic and circuits
Boolean algebra, Logic gates, Circuit simplification, Combinational circuits: Adder,Decoders and Multiplexers, Flip-flops, Sequential circuits: Registers and Counters

Practice:

  •  Verification of truth table of logic gates
  •  Verification of truth table of Flip-flops
  •  Simulation and synthesis of basic logic gates and universal gates using Xilinx
  •  Simulation and synthesis of half adder, full adder, multiplexer, de multiplexer using Xilinx

Assignment:

  • Draw the K’map and simplify the following Boolean expression
    (i)  Y(ABCD)=  Σ m(0,1,3,4,5,14,15,9)
    (ii) F(ABCD)= Σm( 0,2,4,5,7,8,9,11,12,14,15) +  Σd(3,10)
  • Prove that NAND gate and NOR gate are universal gates.
  • Design a Mod-6 synchronous counter.

Module-3: Basic Computer Organization and Design
Computer registers, System Bus, Instruction set, Timing and control unit, Basic Instruction cycle.

Assignment:

  •  Describe flowchart for instruction cycle.

Module-4: Central Processing Unit
Block diagram of computer and operation, Arithmetic and logical micro-operations, Stack organization: Register stack and Memory stack, RISC and CISC characteristics, Pipeline architecture, Parallel architecture: Flynn's classification

Practice:

  • Study of various components of PC.

Assignment:

  •  Describe 16-logical microoperation and the logic circuit
  • Describe Flynn's classification of parallel architecture.

Module-5: Instruction Design
Instruction formats, Addressing modes, Instruction codes

Module-6: Memory Organization
Classification of memory, Primary Memories, Secondary memories, Cache memory, Mapping techniques: Direct, Associative and Set associative, Memory Hierarchy

Practice:

  • Study Anatomy of Motherboard.

Module-7: Input-Output Organization
Input / Output: External Devices, I/O Modules, Programmed I/O and Interrupt-Driven I/O, Direct Memory Access, Input-Output Processor

Practice:

  • Dismantling and assembling a PC

Assignment:

  • Describe DMA transfer operation with block diagram

Text Books

1. M.Mano, Computer System Architecture, Pearson Education, 1992

2. Carl Hamacher, Computer Organization, McGrawHill, 2012.

3. William Stalling,Computer Organization and Architecture Designing for performance, Prentice Hall of India, 2009

Session 2

Fixed and floating point representation

https://www.youtube.com/watch?v=ICJ5dtBUc1M

Session 3

Binary codes and character representation

https://www.youtube.com/watch?v=OqRkzN02M6E

Session 5

Session 6

Session 17

Block diagram of computer and operation

https://www.youtube.com/watch?v=cSOapMh-gbE

Session 19

Stack organization: Register stack and Memory stack

https://www.youtube.com/watch?v=5t_BIROKkLw

Session 20

RISC and CISC characteristics

https://www.youtube.com/watch?v=mDrUkjOVtAU

Session 27

Session 28

Mapping techniques: Direct, Associative and Set associative

https://www.youtube.com/watch?v=QcAaP5V2Gpc

 

 

Session 29

Session 30

Input / Output: External Devices

https://www.youtube.com/watch?v=XP2_TTZjcqg

 

 

Session 31

Input / Output: External Devices

https://www.youtube.com/watch?v=b9frb09L2kU

 

 

Session 32

Programmed I/O and Interrupt-Driven I/O

https://www.youtube.com/watch?v=KayPmnr-C_s

 

 

Session 34

Practice 1

Simulation of multiplication algorithm using C / MATLAB

https://www.youtube.com/watch?v=f_AMb0MGRFA

Practice 2

Simulation of division algorithm using C / MATLAB

https://www.youtube.com/watch?v=f_AMb0MGRFA

Practice 3

Verification of truth table of logic gates

https://www.youtube.com/watch?v=5jePncSmOVA

Practice 4

Verification of truth table of Flip-flops

https://www.youtube.com/watch?v=4b8VW0X6nj4

Practice 5

Simulation and synthesis of  basic logic gates and universal gates using Xilinx

https://www.youtube.com/watch?v=QFFGWRcZMBM

Practice 6

Simulation and synthesis of half adder, full adder, multiplexer, de multiplexer using Xilinx

 

https://www.youtube.com/watch?v=QFFGWRcZMBM

Practice 7

Study of various components of PC.

https://www.youtube.com/watch?v=yRmPTbGBqVI

Practice 9

Dismantling and assembling a PC

https://www.youtube.com/watch?v=JErtMIhwhxI

Case Studies

Case Studies

Our Main Teachers

Dr. J. K. Meher has done Ph.D from Sambalpur University (Odisha). Dr. Meher has, to his credit, more than 24 years’ experience in teaching, research and Industry. His research interests focus on developing digital signal processing and computational systems to address various problems in Bioinformatics, image processing and reconfigurable architecture. Best Teacher award from ISTE, […]