Still no participant
Still no reviews
• Learn the basic architecture of a Shakti processor
• Understand parallelism and multi-core processors
• Learn BlueSpec Verilog programming and implement using FPGA board
• Design and implementation of processors
After completing this course
• The trainee will be able to describe processor architecture
• The trainee will able to design processor using Blue Spec Verilog Programing.
• The trainee will expert on design and verification of processor using BSV Programming
• The trainee will Perform communication between I/O devices
Processor Architecture and Arithmetic Circuits
• Functional Units
• Basic Operational Concepts
• Operations, Operands
• Instruction representation
• Logical operations
• Decision making,
• Floating Point Representation
• Floating Point Operations
• General introduction to the BlueSpec approach
• BSV's concurrency and parallelism semantics
• Abstract rule-based processes.
• BSV to Verilog translation
• Connect BSV into existing Verilog/VHDL
• Export a BSV subsystem as a SystemC module
• Create BSV designs that use multiple clocks or resets
• Interfacing to external RTL
Parallel Processing in Shakti Processor:
• Building a Datapath and Control Implementation Scheme
• Pipelining – Pipelined datapath and control
• Hardware multithreading – Multi-core processors and other Shared Memory Multiprocessors
• Introduction to Graphics Processing Units (Theory only)
• Memory Hierarchy, memory technologies and cache memory (Theory only)
• Accessing I/O Devices
• Interface circuits – USB.
Processor Design (Part-I):
• Programming and Debugging Embedded Processors
• Hardware and Software Requirements
• Programming SHAKTI onto the FPGA boards - Part 1
• Programming SHAKTI onto the FPGA boards - Part 2
• Steps to install SHAKTI-SDK
• Steps to add a simple application to SHAKTI-SDK
Processor Design (Part-II):
• Building a Zynq-7000 SoC Processor, Zynq-7000 SoC Cross Trigger Design
• Building and Programming a MicroBlaze Processor, Create an IP Integrator Design
• Memory-Mapping the Peripherals in IP Integrator
• Building and Programming a RISC-V Processor with IP integration
• Create a Top-Level Wrapper
• Design through Implementation
• Export the Design to SDK
• Peripheral Test Application
• Execute the Software Application on a Artix-7 100T Board
1. David A. Patterson and John L. Hennessy, Computer Organization and Design: The Hardware/Software Interface, Fifth Edition, Morgan Kaufmann / Elsevier, 2014
2. Carl Hamacher, Zvonko Vranesic, Safwat Zaky and Naraig Manjikian, Computer Organization and Embedded Systems, Sixth Edition, Tata McGraw Hill, 2012.
• Bluespec Compiler
• Device Tree Compiler
• Vivado 2018
• Artix-7 100T FPGA Board
Basic Introduction to Computer Architecture.
BSV FIFOs Design.
Pipelining Combinational Circuits.
Hardware Compilation of Bluespec.
ASIC Implementation of Bluespec.
Multistage Pipeline Processor
Branch Prediction Unit
Branch Prediction Unit
Dr. Chandra Sekhar Dash currently works as Assistant Professor in the Department of Electronics and Communication Engineering at Centurion University of Technology and Management, Odisha. His research interests include Semiconductor Non-Volatile Memory (NVM) Technology and its Advanced Applications, Electronics Materials and VLSI Circuits. Dr. Chandra Sekhar Dash received his Ph.D and Masters from VIT University, […]
Satyanarayan Padhy currently working as Assistant Professor in the Department of Electronics and Communication Engineering at Centurion University of Technology and Management, Odisha. His research interests include Digital System Design,Signal Processing and Controller design for power converters. He has received his M.Tech from NIT, Allahabad, India in the Year 2013 and Currently Pursuing his PhD. […]